Jayesh kumar pandey
( NVIDIA INC, USA )
Jayesh Kumar Pandey
Senior DFT Architect, NVIDIA | IEEE Senior Member | Titan Innovation Gold Award Winner
18+ years pioneering DFT/DFX solutions for AI/automotive SoCs at NVIDIA, Qualcomm, and TI. Inventor of U.S. Patent 10,890,620 (in-system test) and architect of NVIDIA’s MATHS framework (IEEE VTS 2022). Led cross-functional teams to deploy security-compliant test IP for PCIe-based systems. Published in IEEE VTS, invited speaker at AIR 2025, and reviewer for ITC/DFT conferences. Expertise spans low-power DFT, ATPG, MBIST, and post-silicon debug using Synopsys/Mentor/Cadence tools. M.Tech (VLSI, IIITM) | B.Tech (EE, NIT Hamirpur).
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ITI 2026 | NIT Agartala, India | Nov 13-14, 2026 | SCOPUS-indexed