Vijayaprabhuvel Rajavel
( Cadence Design Systems )
Vijayaprabhuvel Rajavel is a seasoned VLSI Design for Test (DFT) Engineer with expertise in Product Engineering, ASIC design, scan compression, ATPG, and Electronic Design Automation(EDA). He plays a pivotal role in DFT architecture, methodology development, and pre-sales support. With extensive experience in the semiconductor industry, he has contributed to high-impact projects focused on optimizing test coverage and improving chip reliability. An IEEE member and award-winning professional, Vijay is passionate about advancing DFT processes through automation and AI-driven solutions.
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ICCIS 2025 | BITS Goa, India | Sept. 26-27, 2025