2nd International Conference on Sustainable Computing and Intelligent Systems (SCIS 2025)

Mr. Vikas Jodigatte Nagaraj

From Verification to Responsibility: hardware foundations for trustworthy AI

Abstract:

The growing influence of artificial intelligence across critical domains demands systems that are not only powerful but also responsible, transparent, and accountable. While much of the Responsible AI discourse centers on algorithms and data, the hardware layer forms the trusted foundation on which AI operates. This talk examines how hardware verification—through formal methods, simulation, and AI-assisted analysis—can contribute to Responsible AI by ensuring correctness, security, and ethical compliance at the silicon level. We will discuss emerging directions such as hardware-enabled governance mechanisms, attestation frameworks, and auditable compute architectures that embed accountability directly into hardware. The talk will highlight key challenges, including bias in AI-based verification, explainability, and verification of the verifiers themselves. Finally, we outline opportunities to integrate AI ethics, hardware design, and formal verification toward building a new generation of verifiably responsible AI systems

Profile:

Vikas Nagaraj is a highly experienced Design Verification Engineer with over 20 years of expertise in ASIC design and verification, spanning both pre- and post-silicon environments. He has deep technical knowledge in SystemVerilog, Verilog, VHDL, SystemC, and Specman-e, and has contributed to the development and validation of high-performance semiconductor products across multiple industry-leading companies including AMD, Synapse Design Automation, LSI (Avago Technologies), Microchip Technology, HP, and Texas Instruments.

Vikas has held diverse roles from Design Engineer to DV Manager and Technical Lead, demonstrating strong leadership in verification strategy, testbench development, and cross-functional collaboration. His experience encompasses ASIC design verification, firmware validation, post-synthesis testing, and high-end server systems. He combines strong analytical skills with hands-on technical expertise to ensure robust and reliable silicon solutions.

Currently at AMD, Vikas continues to advance verification methodologies and drive innovation in next-generation semiconductor technologies.